Tape carrier package

ABSTRACT

A liquid crystal display of compact size is disclosed. The liquid crystal display has a tape carrier package and a single integrated PCB for processing a gate driving signal and data driving signal. The tape carrier package includes a base substrate, a gate driver IC formed on said base substrate, an input pattern formed on said base substrate that applies gate driving signals input from an external device to the gate driver IC, a first output pattern formed on said base substrate that outputs a first gate driving signal processed in said gate driver IC, and a second output pattern formed on said base substrate, that outputs a second gate driving signal bypassing the gate driver IC among the gate driving signals.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a tape carrier package for acompact size liquid crystal display (LCD), and more particularly to atape carrier package (TCP) capable of receiving both of gate signal anddata signal which are processed in a single integrated printed circuitboard and transmitting the processed signals to an LCD panel and anotherTCP. Further, the invention relates to a liquid crystal display panel towhich the tape carrier package is applied.

[0003] 2. Description of the Related Art

[0004] Generally, an LCD is a mostly used type of flat panel display.Especially, the small size, lighter weight and lower power consumptionrender the LCD to replace the traditional cathode ray tube (CRT). TheLCD is currently used as a monitor for a lap-top computer and even for adesktop computer, gaining its popularity.

[0005] As shown in FIG. 1, an LCD includes an LCD panel 101 and a lightsupply unit. The LCD panel 101 includes a TFT substrate 10, a colorfilter substrate 20, multiple gate TCPs 30 connected to gate lines (notshown) of the TFT substrate 10, multiple data TCPs 40 connected to datalines (not shown) of the TFT substrate 10, a gate PCB 50 connected tothe multiple gate TCPs 30, a data PCB 60 connected with the multipledata TCPs 40. The light supply unit includes multiple optical sheetssuch as a light guiding plate 90, a light diffusing plate (not shown),etc., a lamp assembly 80, and a receiving case called as “mold frame”.The light guiding plate 90 has a decreasing thickness as it travels fromthe lamp unit 80 to the data PCB 60.

[0006] A power supply unit and a controller that processes gate signalsand data signals coming from an external device are mounted on the dataPCB 60. A gate voltage supply part is formed on the gate PCB 50 andsupplies a gate driving voltage to gate lines by a control signal fromthe controller on the data PCB 60.

[0007] To supply the control signal and the gate driving voltage intothe gate PCB 50 from the data PCB 60, connectors 55 and 65 arerespectively installed in the gate PCB 50 and data PCB 60 and areconnected to each other through a connecting member, “flexible printedcircuit (FPC)”.

[0008] Semiconductor fabrication technologies have developed in theareas of thin film formation, and packaging. This allows semiconductordevices to be mounted on the gate PCB 50 and to function as gate powersupply source on the data PCB 60.

[0009] Under such a configuration, the gate PCB 50 only transfers to thegate TCP 30 gate driving signals processed in the data PCB 60.

[0010] The conventional LCD has following problems.

[0011] First, in order to apply gate driving signals processed in dataPCB 60 to gate PCB 50, gate PCB 50 and data PCB 60 need connectors 55and 65.

[0012] The connectors 55 and 56 are generally installed on the frontsurface or on the rear surface of the PCBs 50 and 60. This increases thethickness of the LCD and makes it difficult to achieve a compact sizeLCD.

[0013] And the flexible printed circuit (FPC) 70 that connects theconnector 55 and the connector 65 complicates the assembly process andincreases the fabrication costs.

[0014] Finally, a bent type PCB that is mostly used currently bends agate PCB 50 and data PCB 60 and they are fixed at the rear surface ofthe reflecting plate of a backlight assembly. In such a configuration,the data PCB 60 is put in a space between a relatively thin side edge 92of the non-symmetric light guiding plate 90 and the mold frame. Thus thedata PCB 69 does not increase the thickness of the LCD much. On theother hand, the gate PCB 50 is put in a space between a thicknessvarying side of the light guiding plate 90, and the mold frame.Specifically, one side of the gate PCB 50 is attached to a thick portionof the rear surface of the light guiding plate 90, making a thick LCDdepending on the thickness of the light guiding plate 90.

SUMMARY OF THE INVENTION

[0015] The present invention is to provide an integrated PCB that has agate PCB and a data PCB on one board and is capable of allowing drivingsignals to be applied to gate lines and data lines without usingadditional connectors and flexible printed circuits.

[0016] It is another object of the present invention to allow a tapecarrier package that receives a driving signal from the integrated PCBto transmit the received driving signal into another tape carrierpackage.

[0017] It is yet another object of the present invention to preventdelays of driving signals when a driving signal processed in theintegrated PCB is sent to gate lines or data lines via tape carrierpackages.

[0018] It is still another object of the present invention to provide animproved assembly between tape carrier packages and TFT substrate,thereby attaining an easy carrying and decreasing the thickness of thepanel.

[0019] To achieve these and other advantages in accordance with thepurpose of the present invention as embodied and broadly described, atape carrier package comprises a base substrate, a gate driver IC formedon the base substrate, an input pattern formed on the base substratethat supplies gate driving signals input from an external device to thegate driver IC, a first output pattern formed on said base substratethat outputs a first gate driving signal processed in the gate driverIC, and a second output pattern formed on said base substrate, thatoutputs a second gate driving signal bypassing the gate driver IC amongthe gate driving signals.

[0020] Also a liquid crystal display panel assembly and a liquid crystaldisplay using such an assembly are disclosed.

BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The above objects and other advantages of the present inventionwill become more apparent by describing in detail a preferred embodimentwith reference to the attached drawings in which:

[0022]FIG. 1 is a perspective view showing a conventional liquid crystaldisplay panel;

[0023]FIG. 2 is an exploded perspective view of the liquid crystaldisplay according to a preferred embodiment of the present invention;

[0024]FIG. 3 is a perspective view of the liquid crystal panel accordingto a preferred embodiment of the present invention;

[0025]FIG. 4 is a partially exploded perspective view of the liquidcrystal display panel according to a preferred embodiment of the presentinvention;

[0026]FIG. 5 is a schematic view for describing an operation of theliquid crystal display panel according to a preferred embodiment of thepresent invention;

[0027]FIG. 6 is a perspective view showing an assembly of tape carrierpackage and TFT substrate of the liquid crystal display panel accordingto a preferred embodiment of the present invention;

[0028]FIG. 7 is a sectional view taken along the line 7-7′ of FIG. 6;and

[0029]FIG. 8 is a partial sectional view of the liquid crystal displayaccording to a preferred embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0030] Reference will now be made in detail to the preferred embodimentsof the present invention, examples of which are illustrated in theaccompanying drawings.

[0031] Hereinafter, a liquid crystal display panel, a tape carrierpackage and a liquid crystal display according to the present inventionare described more fully with reference to the accompanying drawings.

[0032]FIG. 2 is an exploded perspective view of the liquid crystaldisplay according to a preferred embodiment of the present invention.

[0033] The liquid crystal display 601 comprises a liquid crystal displaypanel assembly 200, a back light assembly 300, a chassis 400 and a cover500.

[0034] The back light assembly 300 is comprised of optical sheets 310, alight guiding plate 320, a lamp assembly 330, a light reflecting plate340 and a mold frame as a receiving container.

[0035] Hereinafter, the liquid crystal display panel assembly 200according to the present invention is described referring to the FIG. 3and the liquid crystal display panel is then described more fullyreferring to FIG. 4.

[0036] Referring to FIG. 3, the liquid crystal display panel assembly200 comprises a liquid crystal display panel 202 having a TFT substrate240 and a color filter substrate 250, a liquid crystal (not shown)interposed between the TFT substrate 240 and the color filter substrate250, tape carrier packages 210 and 220 and a single integrated PCB 260.

[0037] Referring to FIG. 4, the liquid crystal display panel 202comprises a TFT substrate 240 and a color filter substrate 250. Thefilter substrate 250 is smaller than the TFT substrate 240 and faces theTFT substrate 240. The TFT substrate 240 includes a gate 261, a dataline 242, a thin film transistor. (not shown) and a pixel electrode (notshown).

[0038] The tape carrier packages 210, 210′, 226, and 229 areelectrically coupled to the TFT substrate 240 and includes gate tapecarrier packages 210 and 210′ and data tape carrier packages 226 and229. The gate tape carrier packages 210 and 210′ are connected to thegate lines on the TFT substrate 240. The data tape carrier packages 226and 229 are connected to the data lines.

[0039] The single integrated PCB 260 that is electrically connected tothe tape carrier packages 226 and 229 has various driving elements forprocessing gate driving signals and data driving signals. The gatedriving signals are input to the gate tape carrier package 210 and thedata driving signals are input to the data tape carrier package 220.

[0040] The color filter substrate 250 includes a transparent glasssubstrate 250. The transparent glass substrate 250 has a lattice typeblack matrix (not shown), an RGB pixel (not shown) and a transparent andconductive ITO (Indium Thin Oxide) electrode. Here, the RGB pixels areformed by patterning a photoresist mixed with RBG pigment. The ITOelectrode functions as a common electrode.

[0041] Meanwhile, the TFT substrate 240 includes a transparent glasssubstrate. On the transparent glass substrate, a plurality of thin filmtransistors (not shown) each induding a gate, a source, and a drain areformed in a matrix arrangement by the semiconductor thin film formationprocess.

[0042] Gate terminals of all the thin film transistors in a row areconnected to a gate line 241 that is extended to an end of the one sideof the TFT substrate 240. Source terminals of all the thin filmtransistors in one column are connected to a data line 242 formed at anend of the other side of the TFT substrate 240. The drain terminal ofeach thin film transistor is connected to an ITO electrode, which is apixel electrode. Therefore, the ITO electrode faces the common electrodeof the color filter substrate 250.

[0043] Further, the gate lines 241 are disposed in an effective displayregion 243 at the same interval with respect to each other while theyare disposed in a perimeter region with a smaller interval than theinterval of the gate line of the effective display region 243, i.e., thegate lines 241 in the perimeter region are concentrated towards outputterminals of the TCPs 210 and 210′.

[0044] The preferred embodiment of the present invention has three gateline groups, although FIG. 4 shows only two gate line groups 245.

[0045] Also, the data lines 242 are disposed in the effective displayregion 243 at the same interval with respect to each other. The datalines 242 are collected toward output terminals of the TCPs 226 and 229on the perimeter region 244 and form a data line group 246 on theperimeter region 244 and connected to the data tape carrier packages 226and 229.

[0046] The preferred embodiment of the present invention has six dataline groups and FIG. 6 shows only two data line groups 246.

[0047] Some lines of a gate line group 245 placed at one edge and somelines of a data line group 246 placed at one edge around a corner of theTFT substrate 240 are connected to each other, thereby forming a firstgate driving signal transmission line 247.

[0048] One end of the first gate driving signal transmission line 247extends to one side of the TFT substrate 240 in which the end of theoutermost gate line group 245 is formed. The other end of the first gatedriving signal transmission line 247 extends to one side of the TFTsubstrate 240 in which the end of the outermost data line group 246adjacent to the gate line group 245 is disposed.

[0049] In the first gate driving signal transmission line 247, an inputterminal 247 a that receives a signal is defined as one end portion ofthe first gate driving signal transmission line 247 at the side of theTCP 226. And an output terminal 247 b is defined as the other end of thefirst gate driving signal transmission line 247 at the side of the TCP221.

[0050] Meanwhile, a second gate driving signal transmission line 248 isformed at the space between the two gate line groups 245.

[0051] One end of the second gate driving signal transmission line 248is formed at one side of the TFT substrate 240 and extends to a desiredlength in parallel with the gate line group 245. The second gate drivingsignal transmission line 248 is bent perpendicularly to the adjacentgate line group 245 and extends again to a desired length. And thesecond gate driving signal transmission line 248 is then bent to beparallel with the adjacent gate line group 245 and extends to the otherside of the TFT substrate 240.

[0052] At this time, an input terminal 248 a is defined as one endportion of the second gate driving signal transmission line 248 and anoutput terminal 248 b is defined as the other end portion of the secondgate driving signal transmission line 248.

[0053] The gate tape carrier packages 210 and 210′ and data tape carrierpackages 226 and 229 will be described more fully referring to the FIG.4.

[0054] The gate tape carrier package 210 is comprised of a FPC 211, agate driver IC 212, a gate driving signal input pattern 213, a firstgate driving signal output pattern (or a bypass line) 214, a second gatedriving signal output pattern 215.

[0055] The gate driver IC 212 is disposed at the rear surface of the FPC211 in a flip chip type manner. The second gate driving signal outputpattern 215 is disposed at the FPC 211 on which the gate driver IC 212is disposed. One end of the second gate driving signal output pattern215 is connected with output terminals of the gate driver IC 212 and theother end of the second gate driving signal output pattern 215 isconnected through an anisotropic conductive film 270 to the gate linegroup 245.

[0056] The gate driving signal input pattern 213 receives the gatedriving signal from the output terminal 247 b of the first gate drivingsignal transmission line 247 and sends the signal to the gate driver IC212.

[0057] Thus, one end of the gate driving signal input pattern 213 isconnected through the anisotropic conductive film 270 to the outputterminal 247 b of the first gate driving signal transmission line 247and the other end of the gate driving signal input pattern 213 isconnected to the input terminals of the gate driver IC 212.

[0058] The first gate driving signal output pattern 214 relays the gatedriving signal from the TCP 226 to the input terminal 248 a of thesecond gate driving signal transmission line 248 formed between the gateline groups 245.

[0059] To realize this, one end of the first gate driving signal outputpattern 214 is connected through the anisotropic conductive film 270 tothe input terminal 248 a of the second gate driving signal transmissionline 248 and the other end the first gate driving signal output pattern214 is connected to the output terminal 247 b of the first gate drivingsignal transmission line 247.

[0060] At this time, the first gate driving signal output pattern 214and the gate driving signal input pattern 213 are formed to be symmetricwith respect to the gate driver IC 212.

[0061] If an output enable signal (OE signal) is ON, the gate drivingsignal, which is input through the gate driving signal input pattern 213to the gate driver IC 212, is processed in the corresponding gate driverIC 212, and then applied to the second gate driving signal outputpattern 215. If the OE signal is OFF, the gate driving signal is notapplied to the second gate driving signal output pattern 215 but to thefirst gate driving signal output pattern 214.

[0062] Meanwhile, the data tape carrier package includes a plurality ofpackages, i.e., a dual functioning tape carrier package 226 forprocessing the gate driving signals and the data driving signals and asingle functioning tape carrier package 229 only for the data drivingsignal.

[0063] Referring to FIG. 4, the dual functioning tape carrier package226 for gate/data driving signals comprises a FPC 221 that is a flexiblebase film 221, the gate driving signal transmission pattern 223, a datadriver IC 222, a data driving signal input pattern 224 and a datadriving signal output pattern 225.

[0064] Further, the data driver IC 222 is disposed at the rear surfaceof the FPC 221 in a flip chip type manner. One end of the data drivingsignal input pattern 224 is connected to input terminals of the datadriver IC 222. And the other end of the data driving signal inputpattern 224 is connected to the single integrated PCB 260.

[0065] In addition, one end of the data driving signal output pattern225 is connected to output terminals of the data driver IC 222, and theother end of the data driving signal output pattern 225 is connectedthrough a anisotropic conductive film 270 to the aforementioned dataline group 246.

[0066] On the FPC 221 of the dual functioning tape carrier package 226for the gate/data driving signals, there are formed the data drivingsignal output pattern 225, the data driving signal input pattern 224,the data driver IC 222 and the gate driving signal transmission pattern223 that is separate from the data driver IC 222.

[0067] One end of the gate driving signal transmission pattern 223 isconnected to the single integrated PCB 260. And the other end of thegate driving signal transmission pattern 223 is connected through theanisotropic conductive film 270 to the input terminal 247 a of the firstgate driving signal transmission line 247.

[0068] Meanwhile, the single functioning tape carrier package 229comprises a FPC 227, a data driver IC 222, a data driving signal inputpattern 224′ and a data driving signal output pattern 225′.

[0069] One end of the data driving signal input pattern 224′ isconnected to the single integrated PCB 260. And the other end of thedata driving signal input pattern 224′ is connected to input terminalsof the data driver IC 222. One end of the data driving signal outputpattern 225′ is connected to output terminals of data driver IC 222. Andthe other end of the data driving signal output pattern 225′ isconnected through the anisotropic conductive film 270 to the data linegroup 246.

[0070] Therefore, the gate driving signal generated from the singleintegrated PCB 260 is input through the gate driving signal transmissionpattern 223 of the dual functioning tape carrier package 226 for thegate/data driving signal, the input terminal 247 a of the first gatedriving signal transmission line 247, the output terminal 247 b of thefirst gate driving transmission line 247 and the gate driving signalinput pattern 213 of the gate tape carrier package 210 to the gatedriver IC 212. The gate driving signal is then input through the secondgate driving signal output pattern 215 to the gate line group 245 by theOE signal. Meanwhile, some of the gate driving signal generated from thesingle integrated PCB 260 are input through the first gate drivingsignal output pattern 214 to the gate driving signal input patter 213′or the first gate driving signal output pattern 214′ of the adjacent TCP211′.

[0071] The signals that come from the single integrated PCB 260 throughthe above passages to the gate line group 245 are a gate clock, the OEsignal, a V_(ON) signal which is a turn-on signal of the thin filmtransistor and a V_(OFF) signal which is a turn-off signal of the thinfilm transistor.

[0072] In addition, the data driving signal generated from the singleintegrated PCB 260 is input through the tape carrier package 221 for thegate/data driving signal and the single functioning tape carrier package229 only for the data driving signal to the data line group 246 of theTFT substrate 240.

[0073] The signals input from the single integrated PCB 260 through thedata driving signal input patterns 224 and 224′, the data driver IC 222and the data driving signal output patterns 225 and 225′ to the dataline group 246, are a STH (Start Horizontal) signal for exactly latchinga color data from an outer data processing unit to the data driver IC222, a LOAD signal which outputs the signal latched in the data driverIC 222 to the liquid crystal display panel assembly 200, a clock signalfor transmitting the data and RGB color data, etc.

[0074] Next, operations of the liquid crystal display according to thepresent invention are described with reference to the accompanyingdrawings.

[0075] Video signals as well as electric power, control signals, andcolor data are input from an external information processing unit to thesingle integrated PCB 260. The single integrated PCB 260 then generatesgate driving signals and data driving signals depending on the inputvideo signals. Thereafter, the data driving signals generated from thesingle integrated PCB 260 are respectively input into the respectivedata driver IC 222 and 222′ via the data driving signal input patterns224 and 224′ of data driving signal transmission lines of the dualfunctioning tape carrier package 226 and the single functioning tapecarrier package 229. The processed data driving signals are loaded toselected data lines 242 of the data line group 246 via the data drivingsignal output patterns 225 and 225′. At this time, gray scale voltagesfor displaying colors are also applied to respective data lines 242.

[0076] Simultaneously, among gate driving signals processed in thesingle integrated PCB 260, a gate voltage is sent to an input terminal247 a of the first gate driving signal transmission line 247 through thegate driving signal transmission pattern. One component of the gatedriving signals is a gate voltage. The gate voltage goes along the firstgate driving signal transmission line 247 and then is sent to the inputterminal of the gate driving signal input pattern 213.

[0077] The driving signals inputted to the gate driving signal inputpattern 213 are also transferred into the gate driving signal inputpattern 213′ of the adjacent gate tape carrier package 210′ through thefirst gate driving signal output pattern 214 connected to the inputterminal of the gate driving signal input pattern 213 and the inputterminal 248 a of the second gate driving signal transmission line 248printed on the TFT substrate 240. By such signal transmissions, all thegate driver IC 212 and 212′ are prepared to apply the gate drivingsignals to the gate lines by the OE signal.

[0078] Next, the OE signal is carried in or carried out into the gatedriver ICs 212 and 212′ via the gate driving signal pattern 223 of theTCP 226, the first gate driving signal transmission line 247, the gatedriving signal input pattern 213, and the second gate driving signaltransmission line 248 in the named order and thereby pre-designated gatevoltages, such as turn-on voltage Von and turn-off voltage Voff areapplied to all of the gate lines within a period of one frame.

[0079] As the Von signal is input into gate terminals of thin filmtransistors placed along the rows through the gate lines 241, the thinfilm transistors are all turned on and the gray scale voltages which hasbeen already applied to the data lines 242 are applied to the pixelelectrodes. This generates an electric field proportional to the grayscale voltage, between the pixel electrode and the common electrode.

[0080] As the voltages are applied to the pixel electrodes, the liquidcrystal interposed between the pixel electrode and the common electrodere-arranges and the light transmittance changes accordingly. As aresult, lights may pass through the TFT substrate 240 depending on thelight transmittance. Thereafter, the lights pass through the RGBelements formed on the color filter substrate 250 and displays an image.At this time, the electric field between the pixel electrode and thecommon electrode is maintained for a period of one frame in which allthe gate lines 241 are turned on in order.

[0081] The above-described operations are performed very quickly and,thus, the liquid crystal display appears to display information in fullcolor.

[0082] The gate driving signals processed in the single integrated PCB260 are input into all the gate lines 241 via the double functioningtape carrier package 226, the gate tape carrier package 210, and thegate driver IC 212.

[0083] Then, the transmission pattern and the transmission lines appliedto the TFT substrate 240, the gate tape carrier package 210, the dualfunctioning tape carrier package 226 are formed in a very small spacewith a fine pitch. This fine pitch pattern and line may form a RC timedelay circuit due to a very high resistance of the substrate and theparasitic capacitance formed between the gate transmission lines.

[0084] The RC time delay circuit may also cause the turn-on voltage Vonand the turn-off voltage Voff of the gate driving signals to bemodulated. A delay in transmission of the gate driving signals degradethe picture quality, causing flickers in the effective display region ofthe panel and a divisional appearance on the effective region of thepanel.

[0085] Moreover, the modulation in the turn-on voltage and the turn-offvoltage affects the gray scale voltage being input into the data lines242, resulting in a variation in the gray scale. In other words, both ofthe gate driving signal delay and the modulation in the turn-on andturn-off voltages significantly degrades the picture quality and displaycolors.

[0086] In order to prevent the gate driving signal transmission delayand the modulation of the turn-on voltage and the turn-off voltage, theresistance between the transmission pattern and the transmission linesneeds to be decreased. The resistance can be theoretically decreased byenlarging the sectional area of the gate driving signal transmissionline and the gate driving signal pattern or sufficiently widening theinterval between the gate driving signal transmission lines.

[0087] However, such a conventional wisdom consumes the scarce resourceof real estate on the TFT substrate 240, making it more difficult toproduce a compact and lighter LCD product.

[0088] Accordingly, several preferred embodiments are disclosed toresolve such drawbacks. They are described with reference to theaccompanying drawing of FIG. 5.

[0089] As described referring to FIGS. 2 to 6, the first gate drivingsignal transmission line 247, the gate driving signal transmissionpattern 223, the gate driving signal input pattern 213, the first gateoutput pattern 214 are grouped in plurality. For example, three gatedriving signal line groups comprise a first gate driving signal linegroup 281, a second gate driving signal line group 282, and a third gatedriving signal line group 283. Each of the three groups has a pluralityof signal transmission lines.

[0090] A plurality of gate driving signals are transferred through therespective corresponding gate driving signal line groups 281, 282, and283 into the respective corresponding gate driver ICs 212. Here, it isnatural for the single integrated PCB 260 to have additional outputterminals A, B, and C which are connected to the respective gate drivingsignal transmission groups.

[0091] Specifically, the first gate driving signal lines group 283 isconnected to the first gate driver IC of the first gate tape carrierpackage, the second gate driving signal line group 282 is connected tothe second gate driver IC of the second gate tape carrier package, andthe third gate driving signal line group 281 is connected to the thirdgate driver IC of the third gate tape carrier package.

[0092] In other words, the plurality of gate driving signal transmissionlines are grouped into several groups and respective groups areconnected to corresponding gate driver ICs in parallel, therebyminimizing the RC time delay during the transmission of the gate drivingsignals and preventing the flicker and picture division appearance.

[0093] As another embodiment, upon considering the length of therespective gate driving signal lines from the single integrated PCB 260,the first gate driving signal line group 281 is longer than the secondgate driving signal line group 282. And the second gate driving signalline group 282 is longer than the third gate driving signal line group283. In the above constitution, since resistance of the lines groups isproportional to the length, the first gate driving signal lines group281 has the biggest resistance when the diameter of the lines of therespective groups are the same. Therefore, in order to prevent RC timedelay due to a difference in the resistance between the three gatedriving signal lines, the diameter of each of signal transmission linesof the first gate driving signal line group is bigger than the secondgate driving line group and the diameter of each of signal transmissionlines of the second gate driving signal line group is bigger than thethird gate driving line group.

[0094] Another embodiment to prevent the flicker and the picturedivision appearance phenomena applies respective gate driving signalscorresponding to the respective gate driving signal line groups 281,282, and 283 to the corresponding gate driving signal line groups 281,282, and 283 with a time interval. A first gate driving signalcorresponding to the first gate driving signal line group 281 is firstapplied to the first gate driving signal line group 281. A second gatedriving signal corresponding to the second gate driving signal linegroup 282 is secondly applied to the second gate driving signal linegroup 282 after a first predetermined time elapses after sending thefirst gate driving signal. Then, a third gate driving signalcorresponding to the third gate driving signal line group 283 is finallyapplied to the third gate driving signal line group 283 after a secondpredetermined time elapses after sending the second gate driving signal.The first and second predetermined time is determined by respectiveresistance values calculated considering the lengths and diameters ofthe first, second, and third gate driving signal line groups 281, 282,and 283.

[0095] As still another embodiment to prevent the flicker and thepicture division appearance problems, respective gate driving signalline groups 281, 282 and 283 are electrically connected to respectivecorresponding gate driver ICs in parallel and a turning resistor thatcontrols the timing of the gate driving signals is connected to therespective gate driving signal line groups 281, 282, and 283 or thesingle integrated PCB 260.

[0096] Specifically, Voff signal that turns off the thin film transistorproves to be sensitively affected by the substrate resistance and thesignal transmission patterns. As described previously, since thesubstrate resistance and the pattern resistance are determined by thetotal length and the diameter of the gate driving signal line groups281, 282, and 283, the gate driving signal line groups have differentsignal arriving time, generating the flicker and the picture divisionappearance problems and degrading the picture quality.

[0097] Therefore, the single integrated PCB 260 generates the Voffsignal considering maximum resistance among the resistances applied tothe gate driving signal line groups 281, 282, and 283.

[0098] However, although the Voff signal is input into respective gatedriver ICs through the respective corresponding gate driving signal linegroups 281, 282, and 283 considering the maximum resistance, the finalVoff signal still has a deviation due to the resistance. Accordingly, inorder to eliminate the deviation, a turning resistor is provided.

[0099] The turning resistor is respectively formed in each of the gatedriving signal line groups 281, 282, and 283 and enables to output aVoff signal with a minimum deviation, thereby eliminating the flickerand the picture division appearance problems.

[0100] Next, a method for operating the LCD panel according to the abovepreferred embodiments is described.

[0101] First, the single integrated PCB 260 generates a gate drivingsignal and a data driving signal. The data driving signal is transformedinto a source signal including a gray scale voltage through the dualfunctioning data tape carrier package 226 and the single functioningdata tape carrier package 229. The source signal is then applied to thedata line group 246.

[0102] The gate driving signals from the single integrated PCB 260 areconcurrently input to all the gate driver ICs 212 of the gate tapecarrier packages 210 through the first gate driving signal line group281 to the third gate driving signal line group 283.

[0103] The first corresponding gate driving IC receives a first gatedriving signal from the single integrated PCB 260 through the third gatedriving signal lines group 283 and then applies Von signals to gatelines in portion of “I” of the effective display region in FIG. 5 usingOE signal. The image of the portion “I” is maintained for one frame.

[0104] The second corresponding gate driving IC receives a second gatedriving signal from the single integrated PCB 260 through the secondgate driving signal line group 282 and then applies Von signals to gatelines in portion “II” of the effective display region in FIG. 5. Thepicture of the portion “II” is also maintained for one frame togetherwith the picture of the portion “I”.

[0105] The third corresponding gate driving IC receives a third gatedriving signal transmitted from the single integrated PCB 260 throughthe first gate driving signal line group 281 and then applies Vonsignals into gate lines in portion “III” of the effective display regionin FIG. 5. The picture of the portion “III” is also maintained for oneframe together with the picture of the portion “I” and portion “II”.

[0106] Because these steps are performed very quickly, it may display amoving picture or a clean still picture on the panel.

[0107] The liquid crystal display panel according to the presentinvention does not need a gate PCB and only the gate tape carrierpackages 210 are coupled to the ends of the gate lines 241 formed on theTFT substrate 240.

[0108] Thus, these gate tape carrier packages 210 are bent and thenattached to the rear surface of the TFT substrate 240 as shown in FIGS.6 and 7. This would produce a compact liquid crystal display panel.

[0109]FIG. 8 is a partial sectional view that can be handled easilyshowing a part of a liquid crystal display according to the presentinvention.

[0110] Referring to FIG. 8, a backlight assembly 300 includes a moldframe 350. The mold frame 350 receives a light reflecting plate 340, alight guiding plate 320, and optical sheets 310 in the named order. Theliquid crystal panel of the present invention is mounted on the opticalsheets 310 and the perimeter region of the liquid crystal panel 200 isfixed by a chassis 400.

[0111] Here, a tape carrier package 210 one end of which is connected tothe TFT substrate 240 is bent and a gate driver IC 212 of the tapecarrier package 210 is attached to the rear surface of the TFT substrate240 by a fixing means such as a double sided adhesive tape, an adhesive,or a clip.

[0112] The mold frame 350 has a receiving groove 350 a that canaccommodate the tape carrier package 210.

[0113] Meanwhile, although the above described embodiments show anddescribe the tape carrier packages of the above-describedconfigurations, a chip on flexible (COF) having more flexible base filmthan the base film of the flexible printed circuit may be also used.

[0114] Also, although FIG. 4 shows and describes that the gate drivingsignal transmission pattern 223 is integrated together with both of thedata driving signal input pattern 224 and the data driving signal outputpattern 225 on the data tape carrier package 226 of FIG. 4, only thegate driving signal transmission pattern 223 may be formed on anindependent flexible base no having a driving chip.

[0115] As described above, the present invention can provide a compactsize liquid crystal display by integrally processing gate and datadriving signals using a single integrated PCB.

[0116] Moreover, using the single integrated PCB may eliminate theconnector and a flexible printed circuit that is used for connecting twoPCBs. As a result, spaces for the connector and the flexible printedcircuit can be saved. Also, the whole assembly process is simplified.

[0117] While the present invention has been described in detail, itshould be understood that various changes, substitutions and alterationscan be made hereto without departing from the spirit and scope of theinvention as defined by the appended claims.

What is claimed is:
 1. A tape carrier package comprising: a basesubstrate; a driver IC formed on said base substrate; an input patternformed on said base substrate, for applying driving signals input froman external device to said driver IC; a first output pattern formed onsaid base substrate, for outputting a first driving signal processed insaid driver IC; and a second output pattern formed on said basesubstrate, for outputting a second driving signal bypassing said driverIC among said driving signals.
 2. The tape carrier package of claim 1,wherein said second output pattern is not connected to the gate driverIC.
 3. The tape carrier package of claim 1, wherein said base substrateis a flexible printed circuit film, and said gate driver IC, said inputpattern, said first output pattern, and said second output pattern areall formed on the same surface of the flexible printed circuit film. 4.A liquid crystal display panel assembly comprising: a single integratedPCB for processing a gate driving signal and a data driving signal; anLCD panel comprising a color filter substrate, and a TFT substratefacing the color filter substrate including a plurality of gate linegroups each having a plurality of gate lines extending to one edge ofthe TFT substrate, a plurality of data line groups each having aplurality of data lines extending to another adjacent edge, and a gatedriving signal line placed between the plurality of gate line groups andthe plurality of data line groups, that transfers the gate drivingsignals; a first tape carrier package for electrically connecting saidsingle integrated PCB to said TFT substrate, applying the data drivingsignals to the plurality of data lines, and applying the gate drivingsignals to the plurality of gate lines; and a second tape carrierpackage for electrically connecting the gate driving signal line to theplurality of gate lines, and applying the gate driving signals to theplurality of gate lines.
 5. The liquid crystal display panel assembly ofclaim 4, wherein the gate driving signal line comprises a plurality ofsignal transferring lines formed on non-effective display region.
 6. Theliquid crystal display panel assembly of claim 4, wherein said gatedriving signal transferring means is made of thin metal film or indiumtin oxide.
 7. The liquid crystal display panel assembly of claim 4,wherein said first tape carrier package comprises: a gate driving signalpattern for applying the gate driving signals from said singleintegrated PCB to the gate driving signal line; and a data drivingsignal pattern for applying the data driving signals from said singleintegrated PCB to the plurality of data lines.
 8. The liquid crystaldisplay panel assembly of claim 4, wherein said first tape carrierpackage comprises: a base substrate; a gate driving signal transmissionpattern formed on one sided face of said base substrate; a data driverIC formed at the one sided face of the base substrate, for processingthe plurality of data driving signals input from the integrated PCB; anda data driving signal transmission pattern comprising a data drivingsignal input pattern and a data driving signal output pattern which areformed on the one sided face of the base substrate, one end of said datadriving signal input pattern being connected to an input terminal of thedata driving IC and one end of said data driving signal output patternbeing connected to an output terminal of the data driving IC.
 9. Theliquid crystal display panel assembly of claim 8, wherein said basesubstrate is a flexible printed circuit film.
 10. The liquid crystaldisplay panel assembly of claim 4, wherein said second tape carrierpackage comprises: a flexible base substrate; a gate driver IC formed atone sided face of the flexible base substrate, for processing the gatedriving signal input through the first tape carrier package from theintegrated PCB; and a gate driving signal transmission patterncomprising a gate driving signal input pattern, a first gate drivingsignal output pattern, and a second gate driving signal output patternall of which are formed on the one sided face of the base substrate,said gate driving signal input pattern being connected to an inputterminal of said gate driver IC, said first gate driving signal outputpattern by-passing a gate driving signal input through said first tapecarrier package without a connection to the input and output terminalsof the gate driver ICs, and said second gate driving signal outputpattern being connected to an output terminal of said gate driver IC.11. A liquid crystal display, comprising: an LCD assembly, comprising: asingle integrated PCB for processing a gate driving signal and a datadriving signal; an LCD panel comprising a color filter substrate and aTFT substrate facing the color filter substrate that includes aplurality of gate line groups each having a plurality of gate linesextending to one edge of the TFT substrate, a plurality of data linegroups each having a plurality of data lines extending to another edgenormal to the gate lines, a first gate driving signal transferring meansplaced between said plurality of gate lines and said plurality datalines, for transferring said gate driving signals from the one edge tothe another edge of the TFT substrate, and a second gate driving signaltransferring means formed on said another edge of the TFT substrate; afirst tape carrier package for electrically connecting said singleintegrated PCB to the TFT substrate, applying said data driving signalsto a selected group of the plurality of data line groups, and applyingthe gate driving signals to the first gate driving signal transferringmeans; a second tape carrier package for applying the data drivingsignal to a non-selected lines group of the plurality of data linegroups; and a third tape carrier package for electrically connecting thefirst gate driving signal transferring means to one of the gate linegroups, and applying the gate driving signal to the gate line groups;and a light supplying unit that supplies light to said LCD assembly. 12.The liquid crystal display of claim 11, wherein said first tape carriercomprises: a base substrate; a gate driving signal pattern formed onsaid base substrate, for receiving the gate driving signal from saidsingle integrated PCB; and a data driving signal pattern comprising adata driver IC for processing the data driving signal, a data drivingsignal input pattern formed in input terminal of the data driver IC, forreceiving the data driving signal from said single integrated PCB, and adata driving signal output pattern formed in output terminal of the datadriver IC.
 13. The liquid crystal display of claim 11, wherein saidthird tape carrier package comprises: a base substrate; a gate driver ICformed on said base substrate; a gate driving signal input patternformed on said base substrate and connected to input terminals of saidgate driver IC and output terminal of the first gate driving signaltransferring means such that the gate driving signals is input from saidsingle integrated PCB to said gate driver IC; a first output patternconnected to output terminal of said gate driver IC and input terminalof the gate line groups such that the gate driving signal processed insaid gate driver IC is input into the gate line groups; and a secondoutput pattern connected to output terminal of said gate driver IC andinput terminal of the second gate driving signal transferring means suchthat the gate driving signal is input to said third tape carrierpackage.
 14. The liquid crystal display of claim 13, wherein said firstoutput pattern is connected to the first gate driving signaltransferring means and said second output pattern is connected to thesecond driving signal transferring means.
 15. The liquid crystal displayof claim 13, wherein said first output pattern is connected to thesecond gate driving signal transferring means and said second outputpattern is connected to the said first driving signal transferringmeans.
 16. The liquid crystal display of claim 12, wherein said basesubstrate is a flexible printed circuit film.
 17. A liquid crystaldisplay, comprising: an LCD assembly, comprising: an LCD panelcomprising: a color filter substrate; and a TFT substrate facing thecolor filter substrate, that includes a plurality of gate line groupseach having a plurality of gate lines extending to one edge of the TFTsubstrate, and a plurality of data line groups each having a pluralityof data lines extending to another edge normal to said the plurality ofgate lines; a plurality of tape carrier packages comprising a gate tapecarrier package connected to the plurality of gate line groups and adata tape carrier package connected to the plurality of data linegroups; a single integrated PCB connected to the data tape carrierpackage, for processing a gate driving signal and a data driving signal;a gate driving signal transferring means for transferring the gatedriving signal of said single integrated PCB into the plurality of gateline groups via the data tape carrier package, the TFT substrate, andthe gate tape carrier package in the named order; a data driving signaltransferring means for transferring the data driving signal of saidsingle integrated PCB into said the plurality of data line groups viathe data tape carrier package; and a light supplying unit that supplieslight to said LCD assembly.
 18. The liquid crystal display of claim 17,wherein said gate driving signal transferring means is a conductivesignal transmission line that connects said single integrated PCB to thegate tape carrier package.
 19. The liquid crystal display of claim 18,wherein said gate driving signal transferring means is a conductivesignal transmission line and diameter of the conductive signaltransmission line increases in proportion to the length thereof.
 20. Theliquid crystal display of claim 18, wherein said gate driving signaltransferring means is a conductive signal transmission line connected toa resistor that controls transmission speed of the gate driving signal.21. The liquid crystal display of claim 20, wherein the resistor is avariable resistor and is formed on said single integrated PCB.
 22. Theliquid crystal display of claim 18, wherein said gate driving signaltransferring means is a conductive signal transmission line and the gatedriving signal is applied differently depending on the length of saidconductive signal transmission line.
 23. The liquid crystal display ofclaim 22, wherein said gate driving signal transferring means has asignal level that is proportional to total length of said conductivesignal transmission line.
 24. A method for assembling said liquidcrystal display of claim 11, comprising the steps of: connecting one endof said third tape carrier package to said TFT substrate and thenbending the other end of said third tape carrier package toward the rearsurface of said TFT substrate; and fixing said the other end of saidthird tape carrier package to the rear surface of said TFT substrate.25. The method of claim 24, wherein said third tape carrier package isfixed by a fixing means.
 26. The method of claim 25, wherein said fixingmeans is one selected from a group consisting of a double sided adhesivetape, an adhesive, and a clip.